Many electronic devices such as portable devices including laptop computers, handheld devices and cellular phones have so-called sleep modes to save power when the device is on but not being used. Such devices typically have integrated circuit (IC) chips with logical blocks that have combinational logic and memory elements such as flip-flops, configured in varieties of ways, to perform various computing functions. When the sleep mode is entered, it is desirable to remove or reduce power from the logical blocks but at the same time, save the states (or values) in the memory elements so that operation can quickly be resumed when the device is re-activated.
Some solutions have involved powering down the memory elements to less than operational voltage levels but with sufficient power to retain the states in the memory elements during the sleep mode. However, for this approach to achieve meaningful power savings (leakage reduction), in many cases, special reduced-leakage transistors (e.g., with thick gates, long channels, etc.) have been required. Unfortunately, such transistors require special processes that can be costly and may not even result in desired leakage reduction.
Other schemes have employed the use of a separate, lower leakage memory element associated with each memory element for whose state is to be retained during a sleep mode. Data is transferred to the separate element just prior to entry of the sleep mode, where power to the rest of the logic and memory elements is substantially (if not completely) shut down. This provides for desired power reduction but requires additional circuit elements and sleep mode control signal routing, among other things.
Accordingly, a new state retentive, sleep mode solution is desired.